1. Field of the Invention
The present invention is in the field of Filtering Brushless DC Motors.
2. Related Art
The invention is in regards to the classical comparator method of zero cross detection in the commutation of brushless DC (BLDC) motors. The state of the art in zero cross detection involves using one or more analog comparators to compare the floating phase voltage to any one or all of three voltage levels, depending on the employed pulse width modulation (PWM) switching scheme. These levels are the driver bridge power supply voltage (VBATT), VBATT/2, or 0V. The comparator reference level chosen depends on the states of the active driver switches. The generic six switch bridge topology with one detection comparator per phase is shown in FIG. 1.
The motor windings develop Back-EMF (BEMF) voltages via Lenz's Law, the shape of which is a function of rotor speed and winding construction. Assuming perfect winding symmetry, the driven phase BEMFs are equal and of opposite polarity, hence they cancel. The floating phase BEMF is bipolar about an offset produced by the driven windings since they share a common Y connection. It is common knowledge that classical comparison methods are applicable to delta connected motors as well. Typically, BLOC motors have a wave shape containing both sinusoidal and trapezoidal characteristics. Regardless, the waveform will reverse polarity at approximately the same point in time. This polarity reversal occurs 30 degrees ahead of the motor commutation time. Synchronous rectification is usually employed to reduce losses in the body diodes of the MOSFETs. Switching may be done on the high or low side, with current recirculation through the opposite side. Accommodation of all switching combinations requires a switchable reference for the comparators as illustrated in FIG. 2.
The motor possesses inductance, and in conjunction with unavoidable capacitances in the system, ringing is introduced during the switch transitions. This ringing causes the floating phase voltage to cross the applicable reference many times per cycle, and unless removed, will be interpreted as false zero crossings. In general, the quantity of false zero crossings due to ringing are proportional to battery voltage, and inversely proportional to motor speed. In the ideal theoretical application, there is no ringing present, and there is only one zero crossing detected.
The source of the problem is illustrated in FIGS. 3 and 4.
It can be seen that at lower speeds, the slope of the ramp is reduced, and more false crossings will be induced. These false crossings are detrimental to proper commutation of the motor. The results are jitter in the speed, torque ripple, and stalling of the motor at higher speeds.
One typical method used to remove this ringing involves digitally filtering the noise zero cross signal through a flip flop clocked by the PWM signal, see for example FIG. 5.
This is effectively digitally filtering the comparator output at the PWM frequency. If the PWM frequency is relatively low, the worst case delay introduced by such a filter is one full PWM period. Consider a two pole pair motor running at 10000 RPM. This translates to a 500 microsecond enable window size. 100 microseconds of delay can easily cause the motor to stall. This causes considerable phase lag at lower PWM frequencies. Commutation failure can occur at higher motor speeds with this method. The flip flop can be clocked at multiples of the PWM frequency to allow comparisons on both high and low PWM states; however this requires the host microcontroller timebase to run at twice the PWM frequency, which may not be possible or practical.
Another method used is to filter the PWM frequency using analog filters. This method introduces a phase lag which will vary with tolerance and aging of the components, as well as be influenced by temperature. The filtering frequency must track with the PWM frequency, and this complicates the ideal filter design as well as compounds the error due to tolerances. One solution is to characterize the typical filtering delay at the PWM frequency and keep the PWM frequency fixed. Since a common method of thermal management in motor drives is to change PWM frequency as mitigation to switching losses, fixing the PWM frequency presents a serious disadvantage.